Post fab wafer processing

KSW Microtec is a reliable partner for all backend processes like electro-less Ni-Au or Pd bumping, solder bumping with Ni-Au under bump metallization (UBM), backside grinding and dicing services of silicium wafer.

1. Bumping inclusive front side lithography
2. Grinding inclusive stress relief
3. Dicing

1. Bumping

Low cost electro-less bumping technologies using Ni-Au or Pd to create metallic bumps up to 20 µm bump height (standard), usable for adhesive flip chip assembly technologies.
Additional wafer front side lithography available.

Wafer bumping types:
1.1 Electroless metallic bumping Palladium (Pd)
1.2 Electroless metallic bumping Nickel-Gold (Ni-Au)

1.1 Electroless Palladium (Pd) Bumping
The rough surface of the Palladium bumps together with a metallic surface (e.g. Aluminum) provides an extremely reliable connection, which is a so-called „cold welding connection”.
The Pd Bumping process is patented by KSW.
Technology:

• Wafer size: 100-200mm (4”-8”)
• Type of material: Pd
• Bump height: 0,8-20 µm
• Pitch: less than 80 µm
• Shear strength: > 100 Mpa

1.2 Electroless Nickel-Gold (Ni-Au) Bumping
Technology:

• Wafer size: 100-200 mm (4“-8“)
• Type of material: Ni-Au
• Bump height:: 1-20 µm
• Pitch: less than 25 µm
• Shear strength: > 100 Mpa
• Ni-height: less than 20 µm
• Au-Flash: 0,05-0,08 µm

2. Wafer dicing

Silicon wafer dicing and cleaning up to 8" wafer, Glass and glass-silicon packages using double blade dicing system.

Technology:

• Double blade dicing system fully automatic
• Very low front and backside chipping
• Wafer size up to 8“
• Wafer thickness less than 100 µm (standard)
• Dicing street greater than 60 µm

Materials:

• Silicon, glass, glass silicon packages

Delivery forms:

• On standard tape on frame
• On UV tape (exposed/unexposed) on frame

3. Backside grinding

Technology:

• Mechanical grinding up to 8" Silicon wafer
• Backside stress release by using mechanical and chemical processing (polishing, etching)